Toward High Efficiency Power Amps

    Why do we accept power amplifiers that get hot to the touch? Any component that gets warm is wasting power - we should strive for amplifiers where every component runs cool. Most standard amplifier designs result in efficiency in the 60% to 75% ballpark. Most of this power is consumed by the final amplifier transistor, and dissipated away as heat. An amplifier that's 70% efficient might put out 2 watts of RF power, and dissipate 0.857 watts as heat.

A state-of-the-art amplifier might run at around 90% efficiency. I'd like to suggest a design path that moves current amplifier design toward state-of-the-art performance. I won't go for ultimate efficiency, but suggest a design approach that moves toward the high efficiency goal. A quick scan will reveal no major circuit changes - these schematics look mighty conventional. And you might be able to retrofit conventional designs to improve their efficiency too.

    I'd like to get away from "Class-X" designations used to characterize non-linear amplifiers. For Class-A, and Class-B (or Class-AB) amps, biasing and design is straightforward. But Class-C through Class-E amps make very small distinctions in operating conditions. Hey, they're all non-linear. Most transistor non-linear amps break some of the conventional Class-C rules anyway. The circuit may look like Class-C, but we'll end up using some Class-E techniques to boost efficiency.

Why do conventional amps get hot?

    Let's concentrate on the final amp transistor collector (or drain) circuit. Yes, the base (or gate) does accept some real power that gets converted to heat. But most power losses involve the collector/emitter (drain/source) area. We can separate losses into two main areas: saturation losses, and switching or transition losses.
    Saturation losses occur while the transistor is conducting current between collector and emitter. If you think of the transistor as a switch, it'd be ON. While ON, the collector-to-emitter voltage can't quite pull to zero, especially when much current flows.
    Transistor data sheets show graphs of saturation voltage on the Y-axis, and collector-to-emitter current on the X-axis. A 2N2222A shows this saturation voltage on a graph called "ON" VOLTAGES. Base current is set at one tenth of collector current. Saturation voltage is only 0.1 volts up to collector currents of 100 ma. From 100 ma to 500 ma, saturation voltage rises to 0.4 volts. Above 500 ma, you're stressing this little transistor, and its saturation voltage rises rather abruptly. Saturation voltage times collector/emitter current gives the power loss, which ends up as heat. Unfortunately this heat raises saturation voltage. A final amp transistor spends nearly half its time in this saturation region. Increasing base drive is about all we can do to minimize saturation losses.

    When the transistor is OFF, so little current flows that power dissipation is next to zero. While OFF, a transistor or FET is very efficient.
    The other loss mechanism (that causes heat) occurs while the transistor switches from OFF to ON, and while switching from ON to OFF. While ON, transistor collector-to-emitter voltage is very small, but collector voltage may be significantly high at the onset of this ON condition. While the collector voltage is dragging down, and current is building toward the ON condition, significant power is consumed by the transistor.
The ON-to-OFF transition is often quicker, and collector voltage often doesn't rise all that quickly. This transition is likely less a problem than the OFF-to-ON transition. Remember, there is one ON-to-OFF transition, and one OFF-to-ON transition every cycle of the RF wave. For higher transmit frequencies, these transition losses climb, making high frequency efficient amps harder to do.
    Much efficiency improvement results from minimizing these transition losses:

    Driving the base with quick decisive transitions helps shorten the transition time. We'd like the transistor either ON or OFF, and spend as little time as possible in between. Choose a fast switching (high frequency) transistor too.

    Quite an efficiency gain can be had by collector waveform sculpting. While the transistor is OFF, collector voltage is solely determined by external components: the choke and the filter. We can arrange these components, and choose values so that collector voltage is near zero at transition times.
    For the ON-to-OFF transition, collector voltage is already near zero. As it turns off we want collector voltage to rise slowly, rather than jump up fast. A conventional PI filter which has one more capacitor than inductor has this characteristic slow start voltage rise. We won't further address this transition.
    For the OFF-to-ON transition, we can make some modification to conventional design to significantly lower the collector voltage. This involves choosing carefully the choke value that feeds DC current in from the power supply. In conventional design, this choke is chosen to be much larger than the resistance that the filter presents to the collector. This is done so that the collector sees a more-or-less resistive load, since the choke parallels the load.
Feeding supply voltage via a choke ensures that average collector voltage is equal to the DC supply voltage (say, 12.0 volts). Since about half the time (while ON) the collector drags the choke (and filter) down close to zero volts, the collector must swing up far above 12 volts while the transistor is OFF. Peak collector voltage swings up to near 30 volts in a sinewavish fashion while the transistor is OFF, and starts down toward 12 volts before the transistor turns ON again. In many designs, at the onset of turning ON, collector voltage is still quite high (perhaps around 12v). The collector must drag this voltage down to zero, causing a spike of power dissipation. Remember, this happens seven million times a second for a 7 MHz. amplifier.
    Now if we choose a choke of smaller value than the design criteria above, the collector waveform changes while the transistor is OFF. It rises to a higher peak, and then it falls to a lower voltage. If we choose the choke value carefully, the collector voltage can swing right down to zero at the moment of transistor turn-ON. This is exactly what is needed to practically eliminate the power dissipation spike at the OFF-to-ON transition. And this single change can significantly boost efficiency, if other criteria (high, square wave drive) are met.

What's the downside?

    We need a transistor that can take the extra collector voltage swing. Peak collector voltage might rise up to 40 volts rather than 30 volts. And peak collector current is larger too (at the end of the ON period). Peak collector current is larger because while ON, the transistor builds extra current through the small choke. This current is dumped into the filter (during the OFF period) and must be replenished during the next ON period. The result is that the filter sees a larger swing, which translates to slightly larger output RF power. So you can see that the extra voltage and current that the transistor encounters is not wasted.
    With a small choke, collector voltage has a higher, narrower peak. This tends to increase even-order harmonics presented to the filter. The filter has more difficulty rejecting the 2nd harmonic enough to meet FCC specs. Second harmonics can be reduced by designing the filter for a slightly lower cutoff frequency, and extending the OFF period at the expense of the ON period (this must be done at the base drive). You'll get slightly less power out as a result.
    You'll also need to more carefully address power supply filtering at the power supply end of the choke. The small choke results in large peak-to-peak currents drawn from the supply. The supply-end of the choke will tend to get yanked around: excellent, short-leaded bypass capacitors should be employed to ensure a steady voltage at this point.
    Larger current swings around the transistor/choke/bypass area could cause ground-loop problems for the amplifier that drives the base. Even more care must be taken with component placement and printed circuit layout issues when this design technique is employed.
    The higher drive levels needed for efficient operation mean that final amp gain is less than normal. More power is required of the driver stage. A compromise is reached where driver dissipation eats into good final amp efficiency.

An example design

    Let's try a design that requires no final amp heat sink. Square wave drive will be ensured by using a TTL open-collector  bus driver chip, originally meant to drive resistor-terminated computer backplane busses. The most appropriate (based on switching speed) is the 75450-series of dual bus drivers. The on-chip driver transistor will be the final amp. We'll pull about a watt from this chip - and it will hardly get warm.
    The open-collector transistor has saturation voltage spec'd at about 0.23v @ 100 ma and 0.5v @  300 ma. Collector breakdown voltage is about 40 v. We'll push this transistor close to these limits.
    According to the data sheet, it takes about 5 ns. for the transistor to turn OFF and 7 ns. to turn ON. Propagation times of  27 ns. are not critical for our application. The final amp transistor has its base driven from an internal drive circuit that provides a square shape. I'll include a method for tweaking the ON vs. OFF timing of this drive to optimize the switching point.
    Let's go for a 40 meter design. The output PI filter is tackled first, using conventional approach. You could use HANDBOOK filter tables, or computer design programs. I started with a program called FDS2 by Bob Lombardi (WB4EHS). Second harmonic suppression is one key design goal of this filter. A 5-element PI filter is likely OK. To increase second harmonic attenuation, I chose a Chebychev response having about 0.1 dB passband ripple. You ought not get too aggressive (choosing higher passband ripple) because component values become more critical. The output impedance is 50 ohms while the input impedance is chosen to be 100 ohms. In conventional design, the input impedance is chosen using the formula Z= Vcc2/(2Po). With a 12 v supply, one watt Po gives us Z  of 72 ohms. When we employ the small-choke trick, we'll end up with more than one watt, hence the design Z of 100 ohms. A few stabs at FDS2 with slightly different cutoff frequencies and input impedance yields the following filter.
schematic 5-element PI filter
    Its no use plotting this filter response in an attempt to discover how much attenuation the second harmonic will experience. For one thing, our final transistor is driving this filter in a very non-linear fashion: ON (low-impedance) then OFF (high-impedance). And since we'll be varying the driving pulse width anyway, the second harmonic content going into the filter is unknown. We'll just have to measure the second harmonic on a spectrum analyzer (or do a fourier transform from 'scope data) and hope that it is lower than -30 dBc.
schematic: 1W output stage    Next, we'll tackle the choke value. At first, the filter and a voltage-controlled switch were entered into a PSPICE schematic along with the choke and 12v DC supply. The choke value was changed until the switching waveform swung down near zero volts at the bottom, just as the switch turns ON. This simulation worked out very accurately in practice, with measured collector voltage swinging very close to zero.
    This amplifier was bread boarded and driven from a TTL function generator at 7 MHz. into a 50 ohm dummy load.
DC current measured 0.093amps, and output power was 1.04 watts RMS. This gives 93.2% collector efficiency. Not bad, right out of the box! Remember, the only difference between this and a conventional design is beefy square-wave drive, and a carefully chosen collector choke.

A complete, 85% efficient transmitter

schematic 40M 1W transmitterThe switching transistor shown above is included inside the 75451 bus-driver chip. To make a proper transmitter, a 7 MHz. signal source that can drive a TTL input gate is needed. And the TTL bus driver requires a +5v source of DC voltage. One transistor is used (in an emitter follower circuit) to give a fairly solid 5.2 volt DC. supply. Another transistor oscillates in a standard Colpitts crystal controlled circuit to provide enough signal to switch a TTL gate on and off. There are actually two bus drivers in the 8-pin 75451 chip - one is used to square up the oscillator signal. A variable resistor adjusts the duty cycle of this square wave to provide a way of switching the output transistor ON at the optimum time point.
    Start this variable 1K resistor at its maximum value. At minimum value, after a microsecond or two, current will build high enough to destroy this transistor! The control should ideally be set by observing pin 5 (collector) voltage on a scope. Adjust till the ON period (when the voltage is yanked to zero) starts at the lowest point of the collector swing. If you don't have a 'scope, monitor DC current drawn from the 12v supply...with key down, decrease its value until DC current rises to about 100 ma.
    The external key is a standard "turn on by grounding" connection that starts up the oscillator by grounding its emitter. No chirp was noticed, however the keying is not shaped and may seem rather clicky.
    The next step will be to make a power oscillator, where some of the output signal is fed back through a crystal to the TTL input. This will eliminate the oscillator transistor, and make a really efficient, simple transmitter. My first attempt worked too well - once keyed, it remained oscillating....even after the key went up. I called it a one-dah transmitter. Once the too-eager oscillation is tamed, it'll appear here.