SW40+ Final Power Amplifier (Q6) QRP power amps are not complex: you'll see from this note that modeling the transistor as a SPST switch gives accurate results. A PSpice switch model is compared with a full-blown PSpice transistor model, and then compared with oscilloscope waveforms taken from a working SW40+.

Q6 substituted with a switch?
output stage schematic Yes, let's try this simplifying model first. Q6's collector/emitter is substituted with a SPST switch. PSPICE controls the on/off state of the switch from a control voltage. So our simple switch actually looks like a four-terminal device: two terminals are the actual switch, while two terminals accept the control voltage. In our case, the control voltage V1 is a 7MHz. square wave so that the switch S1 is on for a time period of 71.4 ns. and off for another 71.4ns. V2 is the +12v D.C. power source. Rantenna represents a 50-ohm dummy load. All other components show their SW40+ schematic designations. Remember, S1 substitutes for the collector-to-emitter connections of Q6.

PSPICE switch simulation waveforms    The PSpice waveform in red shows the switch voltage for three cycles of 7MHz. It should be clear that when the switch is on (short-circuit), its voltage is clamped to zero. When off (open-circuit) switch current is zero, and voltage at the switch terminal can float wherever it wishes. Voltage chooses to arc up over the supply voltage (+12v) in a sinewave fashion for one-half cycle before the switch turn on again.
    Note that the average voltage at the switch must be equal to the supply voltage of 12v. The inductor L2 requires this to be true. When the switch is on, it temporarily drags L2 (and C36) down to ground. Then the switch opens: voltage must soar above the supply in order to keep L2's average voltage at 12v. That's why peak voltage rises to about 34v.
    The combination of C36 and the 50-ohm dummy load resistor must result in average voltage at the load of zero. So the dummy load voltage swings about zero volts: rising to +17v and dipping to -17v (green).
    The five-section PI filter consisting of C37, L3, C38, L4 and C39 accepts only the 7MHz energy and rejects most of the higher harmonics. The result is a clean sinewave at the load, as shown in green.
PSpice transistor modeling
    How accurate could the simple SPST switch model be?
Q5,Q6 PSPICE schematic Let's do a more complete SPICE model that includes not only a transistor for Q6, but a proper driving circuit too. The final amp is actually a 2N4401 transistor that is scaled up in size. Q2's collector drives the primary of a transformer. Coupling between L3 and L4 is tight (99%) as a ferrite toroid should be. This model is very close to the SW40+ schematic, however the parts numbering is different. An attempt was made to see if the final amp's inductive leads would cause switching transients (L8 and L6 are both 5nH). Their affect on the PSpice results is small.

PSpice, switch, scope compared Now let's compare the three cases: the actual collector voltage of Q6 as measured on an oscilloscope, the collector voltage of Q6 from the PSpice model above, and the switch model. The switch model (thin blue line) overlaps the PSpice transistor model (thick red) so closely, that you may not see it. The oscilloscope trace in green has slightly lower amplitude, is a bit more jagged, but maintains the same shape. Note that peak voltage rises up to nearly 30v. The zener diode D12 would clip anything more than 33v, protecting Q6 from overvoltage. Should you decide to raise the supply voltage, D12 should be swapped for one of higher voltage.
Note that circuit operation depends almost entirely on passive component values, not on transistor characteristics. The PI filter is nearly symmetrical so that (at 7MHz.) the transistor "switch" sees a 50-ohm non-reactive load. If the transistor switches efficiently, and component losses are ignored, then we'd have a 12-volt peak square wave applied to the filter. With harmonics rejected, that works out to 1.44w RMS out the antenna.

Is Q6 a class C amplifier?
Here are some "classic" definitions of class C operation:

With no input drive, no collector (plate) current flows
Collector (plate) current flows for less than one-half cycle
Collector (plate) voltage shouldn't saturate

The SW40+ final amp only satisfies the first point. Collector current flows for close to half-a-cycle (perhaps a little more). Collector voltage saturates down to zero volts. Some folks use the term saturation in slightly different context: if input power is increased, the amplifier is said to be saturated when power output no longer increases. At this point, the amplifier has long before hit ground on the negative-going swing (voltage saturation). When cranked up, the SW40+ still has a little more to offer before power saturation, but not much.
I'd hesitate to use the "class A/B/C/D" criteria of operation. Dave has attempted to make the final amp run as efficiently as possible. You can get an idea of how little power is wasted by feeling how cool Q6 is, and by the fact that no heatsink is required. Half-cycle conduction, nearly full saturation, and operating into a high load impedance all contribute to high efficiency. Following the "class-C rules" above would result in wasted power.

Q6 base drive
What's it take to drive Q6's base? It is very low impedance. Voltage here never gets very large because Q6's base clamps to about +1v, and diode D6 clamps to -1v. You might think that R29(51 ohms) establishes the base drive impedance, but it is nearly ten times larger than actual impedance of about six ohms. The one-turn link winding on T4 provides a low driving impedance for Q6's base.